RISC-V Foundational Associate Free Practice Questions

Question 1

What does RISC-V stand for?

Accepted Answer

Reduced Instruction Set Computing, version 5

Question 2

Which privilege mode is used for standard application execution in RISC-V?

Accepted Answer

User mode

Question 3

What is a primary benefit of the RISC-V open standard ISA?

Accepted Answer

Vendor-neutral design allows custom implementations

Question 4

Which unit is responsible for handling interrupts in a RISC-V core?

Accepted Answer

Interrupt Controller

Question 5

What does the CSR space in RISC-V primarily manage?

Accepted Answer

Control and status registers for configuration

Question 6

Which instruction base extension is essential for standard application functionality?

Accepted Answer

I (Base Integer)

Question 7

What is a common use case for the M extension in RISC-V?

Accepted Answer

Performing multiplication and division operations

Question 8

Which privilege mode is typically reserved for firmware and low-level system management?

Accepted Answer

Machine mode

Question 9

What is a common toolchain component for developing RISC-V software?

Accepted Answer

RISC-V assembler and linker

Question 10

Which mechanism allows RISC-V to reduce power consumption in embedded devices?

Accepted Answer

Compressed instruction encoding

Question 11

What does a vector instruction extension enable in RISC-V?

Accepted Answer

Parallel processing of multiple data elements

Question 12

Which privilege mode is used for operating system kernel code?

Accepted Answer

Supervisor mode

Question 13

What is a key feature of the RISC-V specification?

Accepted Answer

It is modular and extensible

Question 14

Which addressing mode is commonly used for accessing memory in RISC-V?

Accepted Answer

Base with offset

Question 15

What is the purpose of the Zicsr extension in RISC-V?

Accepted Answer

To define CSR-related instructions

A lot more is already mapped out